Examiner R Stephen Dildine Jr has allowed 217 of 229 decided applications in Computer Architecture, Software, and Information Security.
R Stephen Dildine Jr maintains a public record in Technology Center 2100 (Computer Architecture, Software, and Information Security) across 2 art units. His pooled allowance rate is 95% of decided applications (those allowed or abandoned, excluding pending matters), based on hundreds of decided applications. The allowance rate across his art units ranges from 94% to 97%. This pooled figure aggregates outcomes across different art units and reflects historical dispositions; it does not predict outcomes in any specific application.
A pooled record combines statistics from multiple art units into a single aggregate. The overall allowance rate represents the examiner's historical result across all decided applications in those units combined. Pooled figures describe past performance and are not predictions about individual applications. Art units may have different subject matter, examination practices, or application characteristics, so individual art-unit records (where available separately) may differ from the aggregate.
These are aggregate statistics from this examiner's past public record — not predictions about any specific application. The per-art-unit figures below show how the record varies across art units. Our approach to patent prosecution →
Each section benchmarks this examiner against that art unit's average. Figures are this examiner's own public record within the art unit; the overall rate above pools them.
Primarily examines input/output (I/O) data transfer, and memory access and allocation.
Primarily examines error detection, correction, and monitoring, and error-correcting coding/decoding.
Lynch LLP represents applicants in patent prosecution before the USPTO. These are general resources about the firm's services — not advice about this examiner or any specific application.
Methodology. This page pools every art unit in which Examiner R Stephen Dildine Jr has a public record within Technology Center 2100. Statistics are computed from publicly available USPTO records, refreshed on a recurring schedule. This page's data was last updated July 14, 2026. The overall allowance rate is total allowed divided by total decided applications (allowed plus abandoned) across all art units — not an average of the per-art-unit rates; pending applications are excluded. Figures are rounded for display. Pooled sample: 229 applications.
Rejection rates. Each §-rate is the share of this examiner's applications that drew at least one office-action rejection in which that statutory ground appears; applications with no rejection on record are excluded, and because grounds can co-occur the four do not sum to 100%. The art-unit figure beside each is the unweighted mean of the per-examiner rates across the art unit, published for §101 and §103 only. Beside the overall allowance rate we show a benchmark: for a single-art-unit examiner it is exactly that art unit's average, labeled “art-unit average”; for an examiner spanning several art units it is the “weighted peer average” — the per-art-unit averages, weighted by this examiner's application count in each — labeled distinctly because it is a blended figure, not any single art unit's average. Both are built from the same per-art-unit averages the panels show.
Lynch LLP is not affiliated with, endorsed by, or sponsored by the United States Patent and Trademark Office. Examiner statistics are derived from publicly available USPTO data.
These statistics describe past examiner behavior and do not predict the outcome of any particular application. Past results do not guarantee future outcomes. Where this page compares an examiner's allowance rate to an art-unit average, that comparison is a factual description of the public record, not a characterization of any individual examiner's conduct or competence.
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